Articles | Volume 11, issue 2
https://doi.org/10.5194/jsss-11-233-2022
https://doi.org/10.5194/jsss-11-233-2022
Regular research article
 | 
10 Aug 2022
Regular research article |  | 10 Aug 2022

Design of a CMOS memristor emulator-based, self-adaptive spiking analog-to-digital data conversion as the lowest level of a self-x hierarchy

Hamam Abd and Andreas König

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Cited articles

Aamir, S. A., Stradmann, Y., Müller, P., Pehle, C., Hartel, A., Grübl, A., Schemmel, J., and Meier, K.: An accelerated lif neuronal network array for a large-scale mixed-signal neuromorphic architecture, IEEE T. Circuit. Syst. I, 65, 4299–4312, 2018. a
Abd, H. and König, A.: A Compact Four Transistor CMOS-Design of a Floating Memristor for Adaptive Spiking Neural Networks and Corresponding Self-X Sensor Electronics to Industry 4.0, tm-Technisches Messen, 87, s91–s96, 2020. a
Abd, H. and König, A.: Adaptive Spiking Sensor System Based on CMOS Memristors Emulating Long and Short-Term Plasticity of Biological Synapses for Industry 4.0 Applications, tm-Technisches Messen, 88, s114–s119, 2021a. a
Abd, H. and König, A.: D10.3 Adaptive Spiking Sensor Electronics Inspired by Biological Nervous System Based on Memristor Emulator for Industry 4.0 Applications, SMSI 2021-Sensors and Instrumentation, 232–233, https://doi.org/10.5162/SMSI2021/D10.3, 2021b. a
Alraho, S., Zaman, Q., and König, A.: Reconfigurable Wide Input Range, Fully-Differential Indirect Current-Feedback Instrumentation Amplifier with Digital Offset Calibration for Self-X Measurement Systems, tm-Technisches Messen, 87, s85–s90, 2020. a, b
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Short summary
We pursue a promising novel self-adaptive spiking neural analog-to-digital data conversion (SN-ADC) design that uses spike time to carry information. Thus, SN-ADC can be effectively translated to aggressive new technologies to implement reliable advanced sensory electronic systems. The SN-ADC supports self-x (self-calibration, self-optimization, and self-healing) and machine learning required for the internet of things and Industry 4.0 and is based on a self-adaptive CMOS memristor.